In personal computers or servers, hierarchically constructed various storage devices are used. A lower-hierarchical storage device is required to be low price and has a large capacity, while a higher-hierarchical one is required to be capable of high-speed access. As a lowest-hierarchical storage device, a magnetic storage such as a hard disk drive and a magnetic tape is generally used. The magnetic storage is nonvolatile and capable of saving a considerably large amount of data at a lower price as compared to a semiconductor memory device or the like. However, the magnetic storage is slow in access speed, and does not have random accessibility in many cases. Therefore, a program or data to be saved for a long period is stored in the magnetic storage, and is optionally changed to a higher-hierarchical storage device.
A main memory is a storage device higher in hierarchy than the magnetic storage. Generally, a DRAM (Dynamic Random Access Memory) is used for the main memory. The DRAM can be accessed at higher speed as compared to the magnetic storage, and in addition, the DRAM has the random accessibility. Further, the DRAM has a characteristic that a cost-per-bit is lower in price than a high-speed semiconductor memory such as an SRAM (Static Random Access Memory).
A highest-hierarchical storage device is an internal cache memory included in an MPU (Micro Processing Unit). The internal cache memory is connected via an internal bus to a core of the MPU, and thus, it can be accessed at remarkably high speed. However, a recording capacity to be secured is considerably small. As a storage device that configures a hierarchy between the internal cache and the main memory, a secondary cache, or a tertiary cache, or the like is used occasionally.
The reason that the DRAM is selected as the main memory is that it has a very good balance between the access speed and the cost-per-bit. Further, the DRAM has a large capacity among the semiconductor memories, and recently, a chip with a capacity of 1 gigabit or more has been developed. However, the DRAM is a volatile memory, and stored data is lost when the power is turned off. Thus, the DRAM is not suitable for a program or data to be save for a long period. In the DRAM, a refresh operation needs to be periodically performed to save the data even while the power supply is turned on. Thus, there is a limit to reduction in power consumption, and there is a problem that complicated control by a controller is needed.
As a nonvolatile semiconductor memory of large capacity, a flash memory is known. However, the flash memory has disadvantages in that a large amount of electricity is needed to write and delete the data, and a writing time and a deleting time are very long. Accordingly, it is not appropriate to replace the DRAM as the main memory. Other nonvolatile memories that have been proposed include an MRAM (Magnetoresistive Random Access Memory), an FRAM (Ferroelectric Random Access memory) or the like. However, it is difficult to obtain a storage capacity equal to that of the DRAM.
On the other hand, as a semiconductor memory that replaces the DRAM, a PRAM (Phase change Random Access Memory) in which a phase change material is used to record is proposed (see U.S. Pat. No. 5,536,947). In the PRAM, the data is stored by a phase state of the phase change material included in a recording layer. That is, the phase change material differs greatly in electrical resistance between a crystalline phase and an amorphous phase. The data can be stored by using this characteristic.
The phase state can be changed by applying a write current to the phase change material, which heats the phase change material. Data-reading is performed by applying a read current to the phase change material and sensing the resistance value. The read current is set to a value sufficiently small as compared to the write current so that no phase change occurs. Thus, the phase state of the phase change material does not change unless a high heat is applied thereto, and accordingly, even when the power is turned off, the data is not lost.
FIG. 9 is a graph showing a current-voltage characteristic of a nonvolatile memory element in which a phase change material is used.
As shown in FIG. 9, a nonvolatile memory element in a crystalline state (defined as “set state” herein) shows a nearly linear current-voltage characteristic A, and can be considered as a general resistance device. Contrary thereto, a nonvolatile memory element in an amorphous state (defined as “reset state” herein) has a so-called negative resistance characteristic B, and is in an almost insulated state unless voltage exceeding a predetermined threshold value Vt is applied. When the voltage exceeds the threshold value Vt, snap-back is caused, and it consequently results in a low resistance.
To change the nonvolatile memory element having such a characteristic from the set state to the reset state, a current in a reset region shown in FIG. 9 can be applied to the nonvolatile memory element. The current in the reset region is a current necessary for heating the phase change material that configures the nonvolatile memory element to a temperature above the melting point. When such a current is applied, and thereafter, the current is cut off to rapidly cool the phase change material. As a result, the phase change material is changed to the amorphous state.
To change the nonvolatile memory element from the reset state to the set state, a current in a set region shown in FIG. 9 can be applied to the nonvolatile memory element. The current in the set region is a current necessary for heating the phase change material that configures the nonvolatile memory element to temperatures above a crystallization temperature and below the melting point. When such a current is applied for a predetermined period, and thereafter, the current is cut off to cool the phase change material. As a result, the phase change material is crystallized.
However, as described above, the nonvolatile memory element in the reset state has the negative resistance characteristic B. Thus, to change from the reset state to the set state, firstly, it is necessary to apply voltage that exceeds the threshold value Vt to the nonvolatile memory element. This leads to the accumulation of electric charges Q defined by CBL×Vt into a bit line in the initial stage of a write operation, where CBL is a capacity of bit line. The accumulated electric charges Q are discharged by the snap-back via the nonvolatile memory element. Accordingly, when the capacity of bit line CBL becomes large, an amount of current to be discharged by the snap-back via the nonvolatile memory element increases.
FIG. 10 is a graph showing a current waveform at the time of changing a nonvolatile memory element from the reset state to the set state.
As shown in FIG. 10, to change the nonvolatile memory element from the reset state to the set state, a current that equals to the set region shown in FIG. 10 can be applied to the nonvolatile memory element. However, as described above, the nonvolatile memory element in the reset state has a negative resistance characteristic. Thus, when the electric charges Q are discharged by the snap-back, an excessive current is passed. While the amount of excessive current depends on the capacity of bit line CBL, in most cases, the excessive current is larger than the current in the reset region, and as a result, the phase change material is momentarily exposed to a high heat.
Accordingly, the excessive current by the snap-back can damage the phase change material. Thus, this can be a cause of decreasing the number of rewritings (rewritable life).